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7855 Commits

Author SHA1 Message Date
Benjamin Valentin
ec67798cf0 cpu/nrf52: fix spi_twi_irq for nrf52805/10/11 
These smaller parts have SPI1 mapped to TWI0 (if SPI1 exists at all).
 2020-08-09 21:46:06 +02:00
Benjamin Valentin
ca2b7e1952 cpu/nrf5x_common: UART: capture whole nrf52 lineup 2020-08-09 21:46:06 +02:00
Benjamin Valentin
1713dca711 cpu/nrf52: gpio: fix build for nrf52811 
We can use a more general conditional here.
 2020-08-09 21:46:06 +02:00
Benjamin Valentin
2f236cb092 cpu/nrf52: only enable instruction cache if available 
The instruction cache is not available on all nrf52 MCUs.
 2020-08-09 21:46:06 +02:00
Benjamin Valentin
ea2638dcac cpu/nrf52: split up vector definition 
The interrupt vectors vary between each member of the family.
To retain sanity, split the vectors file up for each MCU.
 2020-08-09 21:46:06 +02:00
Benjamin Valentin
307495985a cpu/nrf52: not all parts have a FPU 2020-08-09 21:46:06 +02:00
Benjamin Valentin
7a9e68af96 cpu/nrf52: add vendor files for nrf52805/10/20/33 2020-08-09 21:46:06 +02:00
Marian Buschsieweke
234a720571
Merge pull request #14516 from benpicco/bitband_hw 
cortexm_common: fix check for bitbanding feature
 2020-08-08 14:26:49 +02:00
Benjamin Valentin
0e22910c94 cpu/sam_common: set CPU_HAS_BITBAND 
- https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-11057-32-bit-Cortex-M3-Microcontroller-SAM3X-SAM3A_Datasheet.pdf
- http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-11100-32-bit%20Cortex-M4-Microcontroller-SAM4S_Datasheet.pdf
 2020-08-08 12:44:11 +02:00
Benjamin Valentin
e886dad430 cpu/lpc1768: set CPU_HAS_BITBAND 
> Support for Cortex-M3 bit banding.

https://www.nxp.com/docs/en/data-sheet/LPC1769_68_67_66_65_64_63.pdf
 2020-08-08 12:44:11 +02:00
Benjamin Valentin
225f56b5e6 cpu/lm4f120: set CPU_HAS_BITBAND 
> A bit-band region maps each word in a bit-band alias region to a single bit in the bit-band region.
> The bit-band regions occupy the lowest 1 MB of the SRAM and peripheral memory regions. A

https://www.mouser.com/datasheet/2/405/lm4f120h5qr-124014.pdf
 2020-08-08 12:44:11 +02:00
Benjamin Valentin
fae0b00918 cpu/cc26x0: set CPU_HAS_BITBAND 
> Bit-banding is supported in order to reduce the execution time for
> read-modify-write (RMW) operations to memory.
> With bit-banding, certain regions in the memory map
> (SRAM and peripheral space) can use address aliases to access
> individual bits in one atomic operation.

https://www.ti.com/lit/ug/swcu117i/swcu117i.pdf
 2020-08-08 12:44:11 +02:00
Benjamin Valentin
098b37a7dc cpu/cc26x2_cc13x2: set CPU_HAS_BITBAND 
> Bit-banding is supported in order to reduce the execution time for
> read-modify-write (RMW) operations to memory.
> With bit-banding, certain regions in the memory map
> (SRAM and peripheral space) can use address aliases to access
> individual bits in one atomic operation.

https://www.ti.com/lit/ug/swcu185d/swcu185d.pdf
 2020-08-08 12:44:11 +02:00
Benjamin Valentin
b8d49fe627 cpu/cc2538: set CPU_HAS_BITBAND 2020-08-08 12:44:11 +02:00
Benjamin Valentin
848326bed6 cpu/lpc23xx: RTC: cleanup 
- reduce indentation
 - sanitize logic in rtc_set_alarm()
 - ILR register is clear-on-write, writing 0 has no effect
 2020-08-07 19:25:38 +02:00
benpicco
4635be207b
Merge pull request #14726 from benpicco/riot_epoch 
drivers/periph_common: RTC: use RIOT_EPOCH as the RTC reset value
 2020-08-07 19:07:28 +02:00
Leandro Lanzieri
6b52c53db3
Merge pull request #14614 from aabadie/pr/boards/hifive1_clock_kconfig 
boards/hifive1*: add kconfig options to configure the clock
 2020-08-07 17:40:08 +02:00
Benjamin Valentin
97bf000bcd cpu/stm32: use RIOT_EPOCH 2020-08-07 17:39:25 +02:00
Benjamin Valentin
69c436b891 cpu/ezr32wg: set CPU_HAS_BITBAND 2020-08-07 17:38:38 +02:00
benpicco
a455d74621
Merge pull request #14729 from gschorcht/cpu/esp32/vendor_dependeny_boarddir 
cpu/esp32: remove the dependency of vendor code on BOARDDIR
 2020-08-07 17:03:40 +02:00
benpicco
cc1ffc8a4d
Merge pull request #13357 from benemorius/pr/efm32-letimer 
cpu/efm32/timer: add support for LETIMER
 2020-08-07 17:03:01 +02:00
Gunar Schorcht
d19a1f5af5 cpu/esp32: remove the dependency of vendor code on BOARDDIR 2020-08-07 16:09:12 +02:00
benpicco
574676b150
Merge pull request #14700 from fjmolinas/to_cc2538_enhance_rtt 
cpu/cc2538: RTT: implement missing API functions
 2020-08-07 15:11:53 +02:00
Benjamin Valentin
6d684ee748 cpu/lpc23xx: use RIOT_EPOCH 2020-08-07 13:24:58 +02:00
Benjamin Valentin
d02aa4a6b5 cpu/sam0_common: RTC: use RIOT_EPOCH 2020-08-07 13:24:10 +02:00
Alexandre Abadie
7acf81552a
boards/hifive1* cpu/fe310: improve clock customization 2020-08-06 15:59:34 +02:00
Benjamin Valentin
39d71ac671 cpu/sam0_common: GPIO: ignore interrupts when interrupts are disabled 
If we disable an external interrupt, GPIO events that would generate an interrupt will still set the interrupt flag.
That means once we enable the interrupt again, a stale interrupt will be triggered.

This is surprising and probably not what the user wants, unfortunately the API documentation is not very clear about what to expect.
There is however no way to drop those intermediate interrupts with the current API.

Ignoring the events that occurred while the GPIO interrupt were disabled is probably the right (and expected) thing to.
 2020-08-05 16:57:05 +02:00
Kaspar Schleiser
789f10e816 cpu/msp430_common: increase THREAD_STACKSIZE_DEFAULT to 384 
Both tests/pthread_tls and tests/prng_sha256prng fail without this, but
other platforms run fine with their defaults. Lets consider the higher
value a better default.
 2020-08-05 14:32:58 +02:00
Kaspar Schleiser
4f233cd7ea cpu: remove cc430 
The only board with this chipset was the chronos, which has been
removed.
 2020-08-05 14:32:58 +02:00
Kaspar Schleiser
038823c731 cpu/msp430_common/vendor/README.md: add some explanation 2020-08-05 14:32:58 +02:00
Kaspar Schleiser
5a00e2e36c cpu/msp430_common: use __stack for ISR stacks 2020-08-05 14:32:58 +02:00
Kaspar Schleiser
aa2f500d51 cpu/msp430_common: update thread_stack_init to changed ABI 
The old mspgcc used R15-R12 for args 0-3. The newer MSP430 EABI uses
R12-15.

See https://www.ti.com/lit/an/slaa664/slaa664.pdf for more details.
 2020-08-05 14:32:58 +02:00
Kaspar Schleiser
909d740d37 cpu/msp430_common: bump msp430-gcc-support-files to 1.210 2020-08-05 14:32:58 +02:00
Kaspar Schleiser
ef099f9d46 cpu/msp430_common: add NOPs to irq functions 
They might not be necessary, but GCC warns if they're absent.
Thus let's pay the one or two extra instructions for silencing the
warnings.
 2020-08-05 14:32:58 +02:00
Kaspar Schleiser
08c50947cc cpu/msp430_common: move newlib default module decl to Makefile.dep 2020-08-05 14:32:58 +02:00
Kaspar Schleiser
fd335d30ee cpu/msp430: re-create c11_atomics_compat_cpu.hpp using msp430-elf-gcc 2020-08-05 14:32:58 +02:00
Kaspar Schleiser
10213057b1 cpu/msp430: update deps, move to Makefile.dep 2020-08-05 14:32:57 +02:00
Kaspar Schleiser
260ec3666f cpu/msp430: select newlib_nano module if newlib is used 2020-08-05 14:29:07 +02:00
Kaspar Schleiser
8753457e45 cpu/msp430_common: use default newlib heap_stats 2020-08-05 14:29:07 +02:00
Kaspar Schleiser
9db23b6c3d cpu/cc430: update to new support headers 2020-08-05 14:29:07 +02:00
Kaspar Schleiser
dbcf59f196 cpu/msp430: call newlib _init() in startup script 2020-08-05 14:29:07 +02:00
Kaspar Schleiser
178e39afc2 cpu/msp430: remove obsolete stdio code 2020-08-05 14:29:07 +02:00
Kaspar Schleiser
30cf61dd35 cpu/msp430: remove obsolete msp430 specific headers 2020-08-05 14:29:07 +02:00
Kaspar Schleiser
a0aeeb5ff4 cpu/msp430: update to modern gcc & newlib 2020-08-05 14:29:00 +02:00
Kaspar Schleiser
bf072bdd55 cpu/msp430_common: add msp430-gcc-support-files 1.208 2020-08-05 14:27:25 +02:00
Kaspar Schleiser
0268a772ed Revert "cpu/msp430_common: set top of heap for sbrk" 
This reverts commit 55f433103b477bbb139ff0992f69ce6782d6603a.
 2020-08-05 14:27:25 +02:00
Kaspar Schleiser
5b6534e02d Revert "cpu/msp430_common: add real malloc/free functions" 
This reverts commit 419cedf58e4535e72bf5062aa23a5ce7976759b2.
 2020-08-05 14:27:25 +02:00
Benjamin Valentin
a8d5f13ad9
cpu/cc2538: rtt: allow to set alarm and overflow cb independently 
Previously the setting the alarm would overwrite the overflow callback
and vice versa.

Since we can only set one alarm in hardware, always set the alarm to the
closest event of the two.
 2020-08-04 16:22:44 +02:00
Benjamin Valentin
852fd7f531
cpu/cc2538: rtt: implement rtt_get_alarm() 
We can't read back the alarm, so just store it in a variable.
 2020-08-04 16:21:19 +02:00
Benjamin Valentin
d7f722e98f
cpu/cc2538: rtt: implement rtt_set_counter() 
We can't set the hardware counter directly, so always add an offset.
 2020-08-04 16:21:17 +02:00