6869 Commits

Author SHA1 Message Date
61d9f34748 cpu/lpc23xx: add XFA support 2021-02-18 10:46:08 +01:00
b3b04faadb cpu/fe310: add XFA support 2021-02-18 10:46:08 +01:00
858b5ca6ed xfa: remove obsolete empty xfa.ld 2021-02-18 10:46:08 +01:00
ee9d6c879a cpu/native: add XFA support 2021-02-18 10:46:08 +01:00
f411fd4814 cpu/msp430_common: add XFA support 2021-02-18 10:46:08 +01:00
06ec602782 cpu/esp8266: add XFA support 2021-02-18 10:46:08 +01:00
91b987acd6 cpu/esp8266: add ld/ to linker search path, use it 2021-02-18 10:46:08 +01:00
2474fa7af5 cpu/esp32: add XFA support 2021-02-18 10:46:08 +01:00
d8d34e033c cpu/cortexm_common: add XFA handling to linkerscript
The global core/ldscripts/xfa.ld doesn't match our cortexm_base.ld.
This commit directly adds the two XFA lines to cortexm_base.ld.
In addition to that, a dummy (empty) xfa.ld is added, which the linker will pick
instead of core/ldscripts/xfa.ld, effectingly not using it.
2021-02-18 10:46:08 +01:00
José Alamos
093272c562
Merge pull request #16000 from jeandudey/2021_02_12-ieee802154-bitcaps
net/ieee802154/radio: use bitflags for capabilities
2021-02-17 16:56:25 +01:00
benpicco
77035d6df3
Merge pull request #15900 from benpicco/cpu/stm32f1-gpio_test_and_clear
cpu/stm32: GPIO/f1: use bitarithm_test_and_clear()
2021-02-17 15:32:39 +01:00
Jean Pierre Dudey
243de6e501 net/ieee802154/radio: use bitflags for capabilities
Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2021-02-17 10:56:28 +01:00
Benjamin Valentin
17199dbb1c socket_zep: allow to specify MAC address of ZEP device
Add a command-line parameter for setting the EUI-64 of a ZEP device.
This allows a native node to use a persistent ZEP address across reboots.
2021-02-16 18:57:27 +01:00
Alexandre Abadie
bcb23da368
Merge pull request #16005 from benpicco/cpu/nrf52_gpio_count
cpu/nrf5x_common: make GPIO_PIN macro model independent
2021-02-16 16:18:29 +01:00
Joakim Nohlgård
a23b29d42e pic32_common: Add CPU specific xfa.ld variant 2021-02-16 14:55:26 +01:00
Joakim Nohlgård
6adeec09e9 atmega_common: add arch specific XFA ldscript to properly place .roxfa 2021-02-16 14:55:26 +01:00
Benjamin Valentin
eb89482a75 cpu/nrf5x_common: make GPIO_PIN macro model independent
We can use the `GPIO_COUNT` vendor macro to check if there is more than
one GPIO port on nRF52.
This is the case for nRF52840 and nRF52833.
2021-02-14 00:30:25 +01:00
Benjamin Valentin
5a11fd2c66 cpu/nrf51: define GPIO_COUNT
GPIO_COUNT is not defined in the vendor headers, but it's always one
for this family (one GPIO port).
2021-02-14 00:29:47 +01:00
Benjamin Valentin
a8fcc7b238 cpu/nrf5x: only enable DCDC for REG0 if REG0 exists
nRF52833 has POWER_MAINREGSTATUS_MAINREGSTATUS_High, but no POWER->DCDCEN0
register.

This breaks all builds on this MCU.

Fix the ifdef to fix the build.
2021-02-14 00:06:34 +01:00
benpicco
3e3c4d06fb
Merge pull request #15955 from aabadie/pr/boards/microbit-v2
boards: add support for microbit v2
2021-02-13 23:48:43 +01:00
benpicco
84e21e97f1
Merge pull request #15991 from haukepetersen/opt_nrf52_dcdc
cpu/nrf5x: enable DC/DC also for REG0 if VDDH is used
2021-02-13 23:09:12 +01:00
Hauke Petersen
9d7a37a571 cpu/nrf5x: also enable DCDC for REG0 if used 2021-02-12 10:37:43 +01:00
Hauke Petersen
905fb34408 cpu/nrf5x/nrfble: let driver requeset HFXO 2021-02-12 10:16:50 +01:00
Alexandre Abadie
4dc7f33b2b
cpu/fe310: set newlib as default libc 2021-02-11 21:49:43 +01:00
Marian Buschsieweke
efb2adf27a
Merge pull request #15977 from maribu/ptp-api-fix-adjust
drivers/periph_ptp: fix clock adjustment API
2021-02-11 17:28:02 +01:00
Hauke Petersen
63c23598b3 cpu/nrf52: add VDDHDIV5 as ADC input 2021-02-11 10:40:11 +01:00
Alexandre Abadie
41a89a31a9
boards: cpu: nfr52: fix typo in nrf52833 cpu model name 2021-02-10 13:39:51 +01:00
Alexandre Abadie
36ca3845c2
cpu/nrf5x_common: fix pin support for nrf52833xxaa model 2021-02-10 13:39:51 +01:00
Marian Buschsieweke
dbd241ef26
cpu/stm32/periph_ptp: update to new API 2021-02-10 10:09:26 +01:00
benpicco
a69da13d56
Merge pull request #15948 from jeandudey/2021_02_08-cc1350-launchpad
boards: add cc1350 launchpad
2021-02-09 23:34:58 +01:00
Jean Pierre Dudey
b289c698b8 cpu/cc26xx_cc13xx: define GPIO_PIN macro
This allows using the macro inside the periph_conf.h board files since the
periph/gpio.h header can't be included on the peripheral configuration.

Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2021-02-09 23:04:24 +01:00
benpicco
6929577c76
Merge pull request #15845 from benpicco/boards/adafruit-itsybitsy-m4
boards: add adafruit-itsybitsy-m4
2021-02-09 19:41:43 +01:00
Benjamin Valentin
73f58bfa04 cpu/samd5x: Kconfig: don't provide periph_eth on CPU level
It's up to the board to expose it.
2021-02-09 16:15:33 +01:00
benpicco
5fba2c8387
Merge pull request #14448 from benpicco/l2-peerstats-rebased
net/netstats: L1/L2 per neighbor statistics
2021-02-09 14:54:53 +01:00
benpicco
bd79f573c7
Merge pull request #15935 from benpicco/cpu/native-flashpage
cpu/native: add periph/flashpage implementation
2021-02-09 14:54:08 +01:00
Benjamin Valentin
cc9c58aae3 nrfmin: depend on gnrc_netif instead of gnrc_netdev_default
`gnrc_netdev_default` is a pseudomodule, what this driver really wants
is gnrc_netif.
2021-02-09 12:27:58 +01:00
Francisco Molina
85caf7cbc7
drivers/flashpage: add FLASHPAGE_ERASE_STATE definition 2021-02-09 11:11:46 +01:00
benpicco
64779b6f98
Merge pull request #15944 from jeandudey/2021_02_08-cc26x0-cc13x0
cpu/cc26x0: rename to cc26x0_cc13x0
2021-02-08 21:10:06 +01:00
Jean Pierre Dudey
aec0edbcb9 cpu/cc26x0_cc13x0: use SetupTrimDevice only on cc26x0
Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2021-02-08 17:25:42 +01:00
Jean Pierre Dudey
7db791476e cpu/cc26x0: rename to cc26x0_cc13x0
Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2021-02-08 17:25:42 +01:00
Koen Zandberg
0b2810a856
riscv_common: make thread_yield_higher IRQ compatible 2021-02-08 11:04:18 +01:00
Alexandre Abadie
50cf93c719
Merge pull request #15718 from bergzand/pr/rv32i/fe310_rv32i_refactor
riscv_common: Refactor common fe310 code to riscv_common
2021-02-08 10:27:41 +01:00
Benjamin Valentin
1acbd6e560 cpu/native: add periph/flashpage implementation
Add a simple RAM-backed flashpage implementation for native, to
allow for easier testing of flashpage based applications / features.
2021-02-05 23:31:46 +01:00
Koen Zandberg
2692957c0e
riscv_common: Refactor common fe310 code to riscv_common 2021-02-05 09:32:19 +01:00
Koen Zandberg
b666b78602
Merge pull request #15914 from fjmolinas/pr_stm32_flashpage_fix_per
cpu/stm32/flashpage: reset PER after erase
2021-02-03 10:21:04 +01:00
Francisco
3b2a55a923
Merge pull request #15865 from benpicco/pm_layered-default
cpu: make pm_layered a DEFAULT_MODULE
2021-02-03 08:17:29 +01:00
Vincent Dupont
2edf37ed5b cpu/stm32/can: use en_deep_sleep_wake_up by default
Add en_deep_sleep_wake_up = true in default candev_conf in can_params.h
2021-02-02 15:39:27 +01:00
Vincent Dupont
eb0f6582c7 stm32/can: add option to enable deep-sleep per device
Deep-sleep was based on using rx pin as external interrupt to be able to
wake up from stop mode. If rx pin cannot be used as interrupt or user
does not need to wake up from stop from the CAN, an option is now
present. If en_deep_sleep_wake_up is set to false, setting the device to
sleep simply unblock stop mode. Otherwise the behavior is unchanged.
2021-02-02 15:32:25 +01:00
Francisco Molina
3d68406c5b
cpu/stm32/flashpage: reset PER after erase 2021-02-02 11:42:09 +01:00
Benjamin Valentin
4095eac9f2 cpu: mips32r2_common: set BITARITHM_HAS_CLZ
The MIPS ISA implements CLZ:

https://ti.tuwien.ac.at/cps/teaching/courses/cavo/files/MIPS32-IS.pdf

For `tests/periph_gpio` this shaves off 20 bytes on `6lowpan-clicker`.
2021-02-02 11:14:38 +01:00